[dsp] Analog front end design
David Willmore willmore at optonline.netThu Apr 21 04:47:01 UTC 2005
- Previous message: [dsp] Analog front end design
- Next message: [dsp] Analog front end design
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
> I was looking at a nice dual-channel 16-bit CODEC from ADI (AD73322L), but > the problem I ran into with that chip is that it has a limited selection of > sample rates, and they're not baud rate multiples. Maybe the clock could be > changed, but I don't know enough about sigma-delta ADC design to know if > that's really a good idea. Another possibility is to use the MCU's on-board > ADC, but it would require the addition of a buffer and it'll only do 10 bits > of resolution. I'm not sure that'll give enough dynamic range, especially > if I need to do much filtering in software. What's baud rate got to do with it? :) 1200 baud AFSK decode: AD > complex mix with 1700 Hz tone > 600 Hz LPF > ArcTan > clock recovery/data decode Good to hear from you, Scott. Cheers, David
- Previous message: [dsp] Analog front end design
- Next message: [dsp] Analog front end design
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
More information about the dsp mailing list
