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[dsp] Analog front end design

David Willmore willmore at optonline.net
Tue Apr 26 01:49:05 UTC 2005

> On 21 Apr 2005 at 9:29, scott at opentrac.org wrote:
> > It's multiplying each sample in the input waveform by a sample 90 degrees
> > apart at 1700 hz. 
> 	Last year I did some experiments with the Atmel ATMega8 processor
> and used your approach to design a 1200bps AFSK modem. Later changed to 
> the one used on the link below. It gives better decoding. 
> 	I did the 1200bps decoding using 16bit fixed-point math running at 
> 6.144MHz. Lots of power in that Atmel uP!
> 	http://www.baycom.org/~tom/ham/da95/d_dspmod.pdf
> 	BTW, lots of good info on those pages:
> 	http://www.baycom.org/~tom/ham/ham.html

Lots of it in German. :)  My German isn't all that good, but a lot
of the block diagrams and charts are in english.  From the looks of
it, it's a simple matched filter design.  It's okay, but fairly
'old school'. ;) 

But, I've not even implemented my design, so I'm not sure what the
implementation issues will be.


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