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[time-freq] Reflock II observations

Peter Horbaczewskyj peter at microwaves.f9.co.uk
Sun Nov 20 23:01:07 UTC 2005


Hi Bobby,

I totally agree with you, I've been trying to get my board working tonight with not much success at all. 
You really need to go through all the files with a fine toothcomb and drag out the information, and hope 
you've understood it correctly. Currently I am playing with a 10MHz oscillator but don't seem to be getting 
any signals out on the XOR output of the CPLD, using either of the "pps" files. The other two outputs PD2 UP 
and PD2 DN appear to be behaving as you would expect. However, moving the little 0 ohm links to select a 
different output is not the easiest thing to do!! Time to get the scope out and have a proper look.

By the way, I wonder if you realise that Altera provide a standalone piece of software for programming 
their chips called "Quartus II Programmer" currently at Ver 5.0. This certainly has the ByteBlaster MV as 
an option and is pretty simple to use.

The circuit that Steve has just published is essentially that one I built for my programmer, using a 74HC244 
as the interface. This chip will certainly work down to around 2.0V as opposed to the LS types which generally 
need 5V.

Time to go away and ponder what might have gone wrong.


Regards and 73, Peter G4ZXO
  ----- Original Message ----- 
  From: BOBBY 
  To: time-freq at lists.tapr.org 
  Sent: Sunday, November 20, 2005 6:14 PM
  Subject: [time-freq] Reflock II observations


  Hi Folks,
  This kit is starting to feel a bit like walking around blindfolded in a room full of shin high sharp corners...

  I'd like to offer a couple of observations, ideas, suggestions, ramblings ?

  First: I built a Byteblaster clone from a schematic found at:
  http://opencollector.org/history/freecore/Build%20your%20own%20ByteBlaster!.htm
  It's the same connections as Altera's schematic, but much easier to read w/ connector outlines.
  I added a Berg type jumper/selector to allow the 74LS244 Vcc to be optionally powered externally,
  in my case I set it to 4.5V but suspect 5.0V would have made no difference.

  The Quartus II web version doesn't offer Byteblaster as an option, but the Byteblaster II choice
  seemed to work fine. I say "seemed" because I only have the Quartus program to go by at this point.
  Which brings me to the next suggestion.

  It would be useful to have a simple test download that continously toggled one or both of the leds.
  They would serve to indicate that much of the PWB is assembled correctly, the CPLD is functional, 
  it was correctly programmed, and the leds were installed the right way (not obvious from silkscreen). 
  Encouraging and useful to know before taking on the task of getting sources to lock, which can  
  have problems all it's own.

  The kit docs still seem a little skimpy (multiple silkscreen copies excepted), written toward a 
  reader already very familiar with Altera's products and this design in particular. As an example
  I have an email that in part says:
  ----------------
  r2_flex_01 - Reflock II flexible frequency (configured by the R and N
  Divisor jumpers)
  r2_refpps_01 - Reflock II 1PPS
  r2_enhpps_20 - Reflock II enhanced 1PPS

  Each of the files has

  *.txt - gives the jumper settings for the configuration
  *.pin - gives the pins numbers to the pin names
  *.pof - this is the hex file loaded into the CPLD
  ------------------

  I'm happy for help offered, however here  is the .text file for the r2_enhpps_20

  --------------
  -- conf=00 locks to 50KHz multiples
  -- conf=01 locks to 25KHz multiples
  -- conf=10 locks to 12.5 KHz multiples
  -- conf=11 locks to 10 KHz multiples

  the lock detector is not working properly....
  but this is the first time I had a chance
  to see that code in action :)

  note 1pps input is on P2 and REF input is left
  unconnected.

  pps_pol = 1 >> falling edge of 1pps is used
  pps_pol = 0 >> rising edge of 1pps is used

  --------------

  Ouch!  What was that a coffee table ?

  "conf=11 locks to 10 KHz multiples" I'm assuming this means to control my 10 MHz Rb osc, I would set the
  N divider to 1000 and use conf=11. But nowhere tells me this, nor have I found any direction as to where
  "conf=11" would be applied. Ditto for pps polarity.

  73 Bobby k4bga










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