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[time-freq] 1pps/10MHz discipline

Christopher Hoover ch at murgatroid.com
Thu Aug 24 06:12:02 UTC 2006

I was using Reflock II with r2_flex_01 to lock a VCO to my house
standard (10 MHz).
But recently I got interested in the performance of the r2_enhpps_30_1,
and I began taking some measurements.
I'm using an 5 MHz MTI 260 OXCO, with a 15 Hz tuning range from -10 V ..
+ 10 V, negative coefficient.    I tweaked R22 to get some gain out the
EFC opamp to get a swing close to 0 V to 10 V.
I'm not sure which model Isotemp you have, but the MTI 260 is an
interesting case -- it is a very good OXCO. Almost anything you do to
the EFC on this oscillator short of giving it a clean signal from a
clean voltage source (e.g. a 10-turn pot) hurts its short term
stability, which is in the neighborhood of 5E-12.
My initial measurements show that the Reflock II - MTI 260 system has a
stability of ~ 5E-9 (Allan deviation) for tau < 10s, when locked to the
uncorrected (i.e. the uncorrected for sawtooth error) 1 PPS signal from
an M12+, .  This seems reasonable considering that I'm using a 8-second
averaging and that the stability of a typical GPS receiver is ~
10^(-8)/tau.   Given that I'm not bothering with sawtooth correction on
the 1 PPS, this actually seems pretty good.
When locked to the very clean 1 PPS from my Z3801A (it comes from
dividing the OXCO not from the GPS rcvr),  the short term stability of
the Reflock II - MTI 260 system falls to ~ 1E-7 for tau < 10 s.
I'm not sure why the system is performing so poorly in this second case.
I may be doing something wrong, but I have to wonder if the dithering in
the 1 PPS signal from the M12+ doesn't improve the performance of the
TIC block or PWM block  (or both) in the Reflock II design by way of
averaging.    That's only a guess; I need to do more investigation.
The bottom line is that you need a fairly long integration time in the
loop to take full advantage of GPS in a GPS-disciplined OXCO.  However,
the maximum integration time you can use is limited by drift in your
OXCO.  Somewhere around 100 s is a good place to start for a decent
The Shera design has an advantage in that it handles filtering in a
microcontroller and can do longer time constants than the Reflock II can
alone.   It also discards phase jumps in the 1 PPS signal.  (They do
If you married Reflock II with a microcontroller and added your own HDL
to do TIC and PWM (or convince Luis to release his source so you can
borrow those blocks), you can match the Shera design closely.  The
difference in DAC implementations in the two designs should be
considered, too.
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