[time-freq] RE: RefLock II VTUNE

[Steven Bible]

Hi Mike,

I'm afraid that the opamp circuit is not working as I had intended.  My
intension is that the output of the PWM signal from the CPLD would be in the
range of 0-3.3V after it is low-pass filtered by R30, R31, C24, and C25.
The opamp circuit is a non-inverting voltage follower buffer circuit. The
gain of which is set by R26 and R22:

   Vout = (( R22 / R26 ) + 1 ) * Vin   (Vin is pin 3 of the opamp)

I intended that the voltage divider R23, R24, R28 would set the offset
voltage.  Normally in a non-inverting buffer, the left side of R26 would be
ground.  I saw a circuit somewhere in a text book that showed this circuit
with a voltage at that node to change the offset.  I'm trying to find this
circuit again!

So the result would be a sliding 3 volt window within a 12 volt range.

But I think what is happening, is that the voltage divider's thevin
equivalent (R23, R24, R28, R25, R26, R27) is all showing up on R26 and
altering the gain of the circuit.

One solution that Peter GZXO did was replace R22 with a 68K ohm resistor.
This gave him the VTUNE he needed.  What this is doing is increasing the
gain of the circuit and amplifying the PWM 3 volts up to 10 volts.  Of
course, the adjustment of R24 will need to be done to find the right
setting.

I am analyzing this circuit and seeing if there is an adjustment to the
circuit that can be made to do as I had intended.  I am also looking into a
voltage adder circuit that can perhaps do the job better.

Comments and suggestions are welcome.

73,

- Steve, N7HPR
 (n7hpr at tapr.org)



> -----Original Message-----
> From: Owen, Michael [mailto:Michael.Owen at Sensis.com]
> Sent: Monday, June 19, 2006 12:52 PM
> To: Steven Bible; TAPR time and frequency projects
> Subject: RefLock II VTUNE
>
>
> Steve -
>
> What is the approximate range of the VTUNE output?  I'm seeing about
> 0.1-1.5 volts but the schematic suggests that it should be greater.  My
> OCXO needs 0-10VDC.
>
> MRO
> W9IP
>