[time-freq] REF input problems Reflock 2
Luis Cupido cupido at mail.ua.ptWed Feb 29 14:50:48 UTC 2012
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Very fine. Take a look on my web pages and look for the configuration you want. It is indeed advisable to load the 'pof' file again before final conclusions. http://www.qsl.net/ct1dmk/reflock.html lc ct1dmk. On 2/29/2012 1:51 PM, Merv Thomas wrote: > Hi Luis, > > Thanks for the prompt response and information. > > There is definitely no short from pin 89 GCLK2 to any adjacent pin so > the suspect seems to be the CPLD itself. > > I wonder in the event that the firmware that was downloaded into this > CPLD had a glitch in it that pin 89 might have been configured as an > output to ground instead of an input? > > For this reason I have separately emailed you for other files to help > possibly trace a software fault. I have the assistance of a highly > qualified electronics engineer/programmer who is willing to spend time > on this at no cost to me(a fellow radio amateur(VK6IC). > > Any help you or anybody else can provide will be appreciated. > > Regards, > > Merv VK6BMT > ----- Original Message ----- From: <time-freq-request at tapr.org> > To: <time-freq at tapr.org> > Sent: Wednesday, February 29, 2012 8:00 PM > Subject: time-freq Digest, Vol 37, Issue 1 > > >> Send time-freq mailing list submissions to >> time-freq at tapr.org >> >> To subscribe or unsubscribe via the World Wide Web, visit >> https://www.tapr.org/cgi-bin/mailman/listinfo/time-freq >> or, via email, send a message with subject or body 'help' to >> time-freq-request at tapr.org >> >> You can reach the person managing the list at >> time-freq-owner at tapr.org >> >> When replying, please edit your Subject line so it is more specific >> than "Re: Contents of time-freq digest..." >> >> >> Today's Topics: >> >> 1. Reflock 2 (Merv Thomas) >> 2. Re: Reflock 2 (Luis Cupido) >> >> >> ---------------------------------------------------------------------- >> >> Message: 1 >> Date: Wed, 29 Feb 2012 17:49:29 +0800 >> From: "Merv Thomas" <vk6bmt at iinet.net.au> >> Subject: [time-freq] Reflock 2 >> To: <time-freq at tapr.org> >> Message-ID: <CE72EC6C488F43828B1583A447124C25 at merv> >> Content-Type: text/plain; format=flowed; charset="iso-8859-1"; >> reply-type=original >> >> Hi - I have a populated board that is not working. The output of the >> BFT92 >> transistor on the REF input chain - that is the input to CPLD pin 89 >> GCLK2 >> is being pulled down to about 180 mv. If I cut the trace on the board to >> this pin then the output from the BF92 goes up to 2.6v Seems like an >> internal short in the CPLD chip. >> >> The input to pin 91 GCLK3 has 2.6v on it from the BF92 in the VCXO input >> chain which seems correct. >> >> Does this show that the CPLD is not serviceable please? >> >> I know most of the forum comments on this subject go back some years >> so I am >> hoping that maybe Luis Cupido or someone can answer my question!!! >> >> Regards,Merv VK6BMT >> >> >> >> >> ------------------------------ >> >> Message: 2 >> Date: Wed, 29 Feb 2012 11:08:10 +0000 >> From: Luis Cupido <cupido at mail.ua.pt> >> Subject: Re: [time-freq] Reflock 2 >> To: TAPR time and frequency projects <time-freq at tapr.org> >> Message-ID: <4F4E071A.3020904 at mail.ua.pt> >> Content-Type: text/plain; charset=ISO-8859-1; format=flowed >> >> Hi Merv, >> >> You must be sure that you don't have any short circuit on the CPLD >> pins somewhere, the 180mV may suggest also a short circuit to a pin >> being used as output. >> (I did not check how I have the unused pins, but they are likely to be >> configured as outputs driving ground, so check a short to a unused pin ). >> >> Once you have discarded this short circuit possibility >> the CPLD itself will be the next part to suspect. >> >> Luis Cupido. >> ct1dmk. >> >> >> On 2/29/2012 9:49 AM, Merv Thomas wrote: >>> Hi - I have a populated board that is not working. The output of the >>> BFT92 transistor on the REF input chain - that is the input to CPLD pin >>> 89 GCLK2 is being pulled down to about 180 mv. If I cut the trace on the >>> board to this pin then the output from the BF92 goes up to 2.6v Seems >>> like an internal short in the CPLD chip. >>> >>> The input to pin 91 GCLK3 has 2.6v on it from the BF92 in the VCXO input >>> chain which seems correct. >>> >>> Does this show that the CPLD is not serviceable please? >>> >>> I know most of the forum comments on this subject go back some years so >>> I am hoping that maybe Luis Cupido or someone can answer my question!!! >>> >>> Regards,Merv VK6BMT >>> >>> _______________________________________________ >>> time-freq mailing list >>> time-freq at tapr.org >>> https://www.tapr.org/cgi-bin/mailman/listinfo/time-freq >>> >> >> >> >> ------------------------------ >> >> _______________________________________________ >> time-freq mailing list >> time-freq at tapr.org >> https://www.tapr.org/cgi-bin/mailman/listinfo/time-freq >> >> >> End of time-freq Digest, Vol 37, Issue 1 >> **************************************** > > > _______________________________________________ > time-freq mailing list > time-freq at tapr.org > https://www.tapr.org/cgi-bin/mailman/listinfo/time-freq >
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